@unnchapentry{About}{10001}{About}{1}
@unnsecentry{What is OpenOCD?}{10001.1}{}{1}
@unnsecentry{OpenOCD Web Site}{10001.2}{}{2}
@unnsecentry{Latest User's Guide:}{10001.3}{}{2}
@unnsecentry{OpenOCD User's Forum}{10001.4}{}{2}
@unnsecentry{OpenOCD User's Mailing List}{10001.5}{}{2}
@unnsecentry{OpenOCD IRC}{10001.6}{}{2}
@numchapentry{OpenOCD Developer Resources}{1}{Developers}{3}
@numsecentry{OpenOCD Git Repository}{1.1}{}{3}
@numsecentry{Doxygen Developer Manual}{1.2}{}{3}
@numsecentry{Gerrit Review System}{1.3}{}{3}
@numsecentry{OpenOCD Developer Mailing List}{1.4}{}{4}
@numsecentry{OpenOCD Bug Database}{1.5}{}{4}
@numchapentry{Debug Adapter Hardware}{2}{Debug Adapter Hardware}{5}
@numsecentry{Choosing a Dongle}{2.1}{}{5}
@numsecentry{Stand-alone JTAG Probe}{2.2}{}{5}
@numsecentry{USB FT2232 Based}{2.3}{}{5}
@numsecentry{USB-JTAG / Altera USB-Blaster compatibles}{2.4}{}{7}
@numsecentry{USB JLINK based}{2.5}{}{7}
@numsecentry{USB RLINK based}{2.6}{}{7}
@numsecentry{USB ST-LINK based}{2.7}{}{8}
@numsecentry{USB TI/Stellaris ICDI based}{2.8}{}{8}
@numsecentry{USB CMSIS-DAP based}{2.9}{}{8}
@numsecentry{USB Other}{2.10}{}{8}
@numsecentry{IBM PC Parallel Printer Port Based}{2.11}{}{9}
@numsecentry{Other...}{2.12}{}{10}
@numchapentry{About Jim-Tcl}{3}{About Jim-Tcl}{11}
@numchapentry{Running}{4}{Running}{12}
@numsecentry{Simple setup, no customization}{4.1}{}{12}
@numsecentry{What OpenOCD does as it starts}{4.2}{}{13}
@numchapentry{OpenOCD Project Setup}{5}{OpenOCD Project Setup}{14}
@numsecentry{Hooking up the JTAG Adapter}{5.1}{}{14}
@numsecentry{Project Directory}{5.2}{}{15}
@numsecentry{Configuration Basics}{5.3}{}{15}
@numsecentry{User Config Files}{5.4}{}{16}
@numsecentry{Project-Specific Utilities}{5.5}{}{17}
@numsecentry{Target Software Changes}{5.6}{}{18}
@numsecentry{Target Hardware Setup}{5.7}{}{19}
@numchapentry{Config File Guidelines}{6}{Config File Guidelines}{21}
@numsecentry{Interface Config Files}{6.1}{}{25}
@numsecentry{Board Config Files}{6.2}{}{26}
@numsubsecentry{Communication Between Config files}{6.2.1}{}{26}
@numsubsecentry{Variable Naming Convention}{6.2.2}{}{27}
@numsubsecentry{The reset-init Event Handler}{6.2.3}{}{27}
@numsubsecentry{JTAG Clock Rate}{6.2.4}{}{28}
@numsubsecentry{The init_board procedure}{6.2.5}{}{28}
@numsecentry{Target Config Files}{6.3}{}{29}
@numsubsecentry{Default Value Boiler Plate Code}{6.3.1}{}{30}
@numsubsecentry{Adding TAPs to the Scan Chain}{6.3.2}{}{30}
@numsubsecentry{Add CPU targets}{6.3.3}{}{31}
@numsubsecentry{Define CPU targets working in SMP}{6.3.4}{}{31}
@numsubsecentry{Chip Reset Setup}{6.3.5}{}{32}
@numsubsecentry{The init_targets procedure}{6.3.6}{}{33}
@numsubsecentry{The init_target_events procedure}{6.3.7}{}{34}
@numsubsecentry{ARM Core Specific Hacks}{6.3.8}{}{34}
@numsubsecentry{Internal Flash Configuration}{6.3.9}{}{34}
@numsecentry{Translating Configuration Files}{6.4}{}{34}
@numchapentry{Daemon Configuration}{7}{Daemon Configuration}{36}
@numsecentry{Configuration Stage}{7.1}{}{36}
@numsecentry{Entering the Run Stage}{7.2}{}{36}
@numsecentry{TCP/IP Ports}{7.3}{}{37}
@numsecentry{GDB Configuration}{7.4}{}{37}
@numsecentry{Event Polling}{7.5}{}{38}
@numchapentry{Debug Adapter Configuration}{8}{Debug Adapter Configuration}{40}
@numsecentry{Interface Configuration}{8.1}{}{40}
@numsecentry{Interface Drivers}{8.2}{}{41}
@numsecentry{Transport Configuration}{8.3}{}{50}
@numsubsecentry{JTAG Transport}{8.3.1}{}{50}
@numsubsecentry{SWD Transport}{8.3.2}{}{51}
@numsubsecentry{CMSIS-DAP Transport}{8.3.3}{}{51}
@numsubsecentry{SPI Transport}{8.3.4}{}{51}
@numsecentry{JTAG Speed}{8.4}{}{51}
@numchapentry{Reset Configuration}{9}{Reset Configuration}{53}
@numsecentry{Types of Reset}{9.1}{}{53}
@numsecentry{SRST and TRST Issues}{9.2}{}{53}
@numsecentry{Commands for Handling Resets}{9.3}{}{54}
@numsecentry{Custom Reset Handling}{9.4}{}{56}
@numchapentry{TAP Declaration}{10}{TAP Declaration}{58}
@numsecentry{Scan Chains}{10.1}{}{58}
@numsecentry{TAP Names}{10.2}{}{59}
@numsecentry{TAP Declaration Commands}{10.3}{}{59}
@numsecentry{Other TAP commands}{10.4}{}{61}
@numsecentry{TAP Events}{10.5}{}{61}
@numsecentry{Enabling and Disabling TAPs}{10.6}{}{61}
@numsecentry{Autoprobing}{10.7}{}{62}
@numchapentry{CPU Configuration}{11}{CPU Configuration}{64}
@numsecentry{Target List}{11.1}{}{64}
@numsecentry{Target CPU Types and Variants}{11.2}{}{65}
@numsecentry{Target Configuration}{11.3}{}{66}
@numsecentry{Other $target_name Commands}{11.4}{}{68}
@numsecentry{Target Events}{11.5}{}{70}
@numchapentry{Flash Commands}{12}{Flash Commands}{73}
@numsecentry{Flash Configuration Commands}{12.1}{}{73}
@numsecentry{Erasing, Reading, Writing to Flash}{12.2}{}{74}
@numsecentry{Other Flash commands}{12.3}{}{76}
@numsecentry{Flash Driver List}{12.4}{}{76}
@numsubsecentry{External Flash}{12.4.1}{}{76}
@numsubsecentry{Internal Flash (Microcontrollers)}{12.4.2}{}{77}
@numsubsecentry{str9xpec driver}{12.4.3}{}{85}
@numsecentry{mFlash}{12.5}{}{87}
@numsubsecentry{mFlash Configuration}{12.5.1}{}{87}
@numsubsecentry{mFlash commands}{12.5.2}{}{87}
@numchapentry{Flash Programming}{13}{Flash Programming}{88}
@numchapentry{NAND Flash Commands}{14}{NAND Flash Commands}{89}
@numsecentry{NAND Configuration Commands}{14.1}{}{89}
@numsecentry{Erasing, Reading, Writing to NAND Flash}{14.2}{}{90}
@numsecentry{Other NAND commands}{14.3}{}{92}
@numsecentry{NAND Driver List}{14.4}{}{93}
@numchapentry{PLD/FPGA Commands}{15}{PLD/FPGA Commands}{96}
@numsecentry{PLD/FPGA Configuration and Commands}{15.1}{}{96}
@numsecentry{PLD/FPGA Drivers, Options, and Commands}{15.2}{}{96}
@numchapentry{General Commands}{16}{General Commands}{97}
@numsecentry{Daemon Commands}{16.1}{}{97}
@numsecentry{Target State handling}{16.2}{}{98}
@numsecentry{I/O Utilities}{16.3}{}{100}
@numsecentry{Memory access commands}{16.4}{}{100}
@numsecentry{Image loading commands}{16.5}{}{101}
@numsecentry{Breakpoint and Watchpoint commands}{16.6}{}{102}
@numsecentry{Misc Commands}{16.7}{}{102}
@numchapentry{Architecture and Core Commands}{17}{Architecture and Core Commands}{103}
@numsecentry{ARM Hardware Tracing}{17.1}{}{103}
@numsubsecentry{ETM Configuration}{17.1.1}{}{103}
@numsubsecentry{ETM Trace Operation}{17.1.2}{}{105}
@numsubsecentry{Trace Port Drivers}{17.1.3}{}{106}
@numsecentry{Generic ARM}{17.2}{}{107}
@numsecentry{ARMv4 and ARMv5 Architecture}{17.3}{}{107}
@numsubsecentry{ARM7 and ARM9 specific commands}{17.3.1}{}{108}
@numsubsecentry{ARM720T specific commands}{17.3.2}{}{108}
@numsubsecentry{ARM9 specific commands}{17.3.3}{}{108}
@numsubsecentry{ARM920T specific commands}{17.3.4}{}{109}
@numsubsecentry{ARM926ej-s specific commands}{17.3.5}{}{109}
@numsubsecentry{ARM966E specific commands}{17.3.6}{}{109}
@numsubsecentry{XScale specific commands}{17.3.7}{}{110}
@numsecentry{ARMv6 Architecture}{17.4}{}{112}
@numsubsecentry{ARM11 specific commands}{17.4.1}{}{112}
@numsecentry{ARMv7 Architecture}{17.5}{}{113}
@numsubsecentry{ARMv7 Debug Access Port (DAP) specific commands}{17.5.1}{}{113}
@numsubsecentry{Cortex-M specific commands}{17.5.2}{}{113}
@numsecentry{Intel Architecture}{17.6}{}{114}
@numsubsecentry{x86 32-bit specific commands}{17.6.1}{}{114}
@numsecentry{OpenRISC Architecture}{17.7}{}{115}
@numsubsecentry{TAP and Debug Unit selection commands}{17.7.1}{}{115}
@numsubsecentry{Registers commands}{17.7.2}{}{115}
@numsecentry{Software Debug Messages and Tracing}{17.8}{}{116}
@numchapentry{JTAG Commands}{18}{JTAG Commands}{118}
@numsecentry{Low Level JTAG Commands}{18.1}{}{118}
@numsecentry{TAP state names}{18.2}{}{120}
@numchapentry{Boundary Scan Commands}{19}{Boundary Scan Commands}{121}
@numsecentry{SVF: Serial Vector Format}{19.1}{}{121}
@numsecentry{XSVF: Xilinx Serial Vector Format}{19.2}{}{121}
@numchapentry{Utility Commands}{20}{Utility Commands}{122}
@numsecentry{RAM testing}{20.1}{}{122}
@numsecentry{Firmware recovery helpers}{20.2}{}{122}
@numchapentry{TFTP}{21}{TFTP}{123}
@numchapentry{GDB and OpenOCD}{22}{GDB and OpenOCD}{124}
@numsecentry{Connecting to GDB}{22.1}{}{124}
@numsecentry{Sample GDB session startup}{22.2}{}{124}
@numsecentry{Configuring GDB for OpenOCD}{22.3}{}{125}
@numsecentry{Programming using GDB}{22.4}{}{126}
@numsecentry{Using OpenOCD SMP with GDB}{22.5}{}{126}
@numsecentry{RTOS Support}{22.6}{}{127}
@numchapentry{Tcl Scripting API}{23}{Tcl Scripting API}{129}
@numsecentry{API rules}{23.1}{}{129}
@numsecentry{Internal low-level Commands}{23.2}{}{129}
@numsecentry{OpenOCD specific Global Variables}{23.3}{}{130}
@numsecentry{Tcl RPC server}{23.4}{}{130}
@numchapentry{FAQ}{24}{FAQ}{131}
@numchapentry{Tcl Crash Course}{25}{Tcl Crash Course}{136}
@numsecentry{Tcl Rule #1}{25.1}{}{136}
@numsecentry{Tcl Rule #1b}{25.2}{}{136}
@numsecentry{Per Rule #1 - All Results are strings}{25.3}{}{136}
@numsecentry{Tcl Quoting Operators}{25.4}{}{136}
@numsecentry{Consequences of Rule 1/2/3/4}{25.5}{}{137}
@numsubsecentry{Tokenisation & Execution.}{25.5.1}{}{137}
@numsubsecentry{Command Execution}{25.5.2}{}{137}
@numsubsecentry{The FOR command}{25.5.3}{}{138}
@numsubsecentry{FOR command implementation}{25.5.4}{}{138}
@numsecentry{OpenOCD Tcl Usage}{25.6}{}{139}
@numsubsecentry{source and find commands}{25.6.1}{}{139}
@numsubsecentry{format command}{25.6.2}{}{140}
@numsubsecentry{Body or Inlined Text}{25.6.3}{}{140}
@numsubsecentry{Global Variables}{25.6.4}{}{141}
@numsecentry{Other Tcl Hacks}{25.7}{}{141}
@appentry{The GNU Free Documentation License.}{A}{License}{142}
@unnsecentry{ADDENDUM: How to use this License for your documents}{10001.1}{}{148}
@unnchapentry{OpenOCD Concept Index}{10002}{OpenOCD Concept Index}{149}
@unnchapentry{Command and Driver Index}{10003}{Command and Driver Index}{151}
