\entry{about}{1}{about}
\entry{TAP}{1}{TAP}
\entry{JTAG}{1}{JTAG}
\entry{developers}{3}{developers}
\entry{dongles}{5}{dongles}
\entry{FTDI}{5}{FTDI}
\entry{wiggler}{5}{wiggler}
\entry{zy1000}{5}{zy1000}
\entry{printer port}{5}{printer port}
\entry{USB Adapter}{5}{USB Adapter}
\entry{RTCK}{5}{RTCK}
\entry{Jim-Tcl}{11}{Jim-Tcl}
\entry{tcl}{11}{tcl}
\entry{command line options}{12}{command line options}
\entry{logfile}{12}{logfile}
\entry{directory search}{12}{directory search}
\entry{config file, user}{16}{config file, user}
\entry{user config file}{16}{user config file}
\entry{config file, overview}{16}{config file, overview}
\entry{vector_catch}{17}{vector_catch}
\entry{ARM semihosting}{18}{ARM semihosting}
\entry{config file, board}{21}{config file, board}
\entry{board config file}{21}{board config file}
\entry{variable names}{23}{variable names}
\entry{event, reset-init}{23}{event, reset-init}
\entry{reset-init handler}{23}{reset-init handler}
\entry{init_board procedure}{24}{init_board procedure}
\entry{config file, target}{25}{config file, target}
\entry{target config file}{25}{target config file}
\entry{SMP}{27}{SMP}
\entry{init_targets procedure}{29}{init_targets procedure}
\entry{init_target_events procedure}{29}{init_target_events procedure}
\entry{translation}{30}{translation}
\entry{initialization}{32}{initialization}
\entry{configuration stage}{32}{configuration stage}
\entry{config command}{32}{config command}
\entry{TCP port}{33}{TCP port}
\entry{server}{33}{server}
\entry{port}{33}{port}
\entry{security}{33}{security}
\entry{GDB server}{33}{GDB server}
\entry{GDB}{34}{GDB}
\entry{GDB configuration}{34}{GDB configuration}
\entry{config file, interface}{36}{config file, interface}
\entry{interface config file}{36}{interface config file}
\entry{Transport}{46}{Transport}
\entry{JTAG}{46}{JTAG}
\entry{SWD}{47}{SWD}
\entry{Serial Wire Debug}{47}{Serial Wire Debug}
\entry{SPI}{47}{SPI}
\entry{Serial Peripheral Interface}{47}{Serial Peripheral Interface}
\entry{adaptive clocking}{48}{adaptive clocking}
\entry{RTCK}{48}{RTCK}
\entry{Reset Configuration}{49}{Reset Configuration}
\entry{events}{52}{events}
\entry{TAP declaration}{54}{TAP declaration}
\entry{TAP configuration}{54}{TAP configuration}
\entry{scan chain}{54}{scan chain}
\entry{dotted name}{55}{dotted name}
\entry{TAP naming convention}{55}{TAP naming convention}
\entry{events}{57}{events}
\entry{TAP events}{57}{TAP events}
\entry{JTAG Route Controller}{57}{JTAG Route Controller}
\entry{jrc}{57}{jrc}
\entry{autoprobe}{58}{autoprobe}
\entry{JTAG autoprobe}{58}{JTAG autoprobe}
\entry{GDB target}{60}{GDB target}
\entry{target, current}{60}{target, current}
\entry{target, list}{60}{target, list}
\entry{target type}{61}{target type}
\entry{CPU type}{61}{CPU type}
\entry{object command}{64}{object command}
\entry{target events}{65}{target events}
\entry{events}{65}{events}
\entry{flash configuration}{69}{flash configuration}
\entry{flash erasing}{70}{flash erasing}
\entry{flash reading}{70}{flash reading}
\entry{flash writing}{70}{flash writing}
\entry{flash programming}{70}{flash programming}
\entry{flash protection}{72}{flash protection}
\entry{Common Flash Interface}{73}{Common Flash Interface}
\entry{CFI}{73}{CFI}
\entry{Generic JTAG2SPI driver}{73}{Generic JTAG2SPI driver}
\entry{SPI}{73}{SPI}
\entry{jtagspi}{73}{jtagspi}
\entry{bscan_spi}{73}{bscan_spi}
\entry{NXP SPI Flash Interface}{74}{NXP SPI Flash Interface}
\entry{SPIFI}{74}{SPIFI}
\entry{lpcspifi}{74}{lpcspifi}
\entry{STMicroelectronics Serial Memory Interface}{74}{STMicroelectronics Serial Memory Interface}
\entry{SMI}{74}{SMI}
\entry{stmsmi}{74}{stmsmi}
\entry{ambiqmicro}{75}{ambiqmicro}
\entry{apollo}{75}{apollo}
\entry{at91samd}{75}{at91samd}
\entry{at91sam3}{76}{at91sam3}
\entry{at91sam4}{77}{at91sam4}
\entry{at91sam4l}{77}{at91sam4l}
\entry{atsamv}{78}{atsamv}
\entry{kinetis}{79}{kinetis}
\entry{kinetis_ke}{81}{kinetis_ke}
\entry{str9xpec}{89}{str9xpec}
\entry{NAND}{91}{NAND}
\entry{NAND configuration}{92}{NAND configuration}
\entry{NAND reading}{93}{NAND reading}
\entry{NAND erasing}{93}{NAND erasing}
\entry{NAND programming}{93}{NAND programming}
\entry{NAND writing}{93}{NAND writing}
\entry{NAND programming}{93}{NAND programming}
\entry{NAND verification}{94}{NAND verification}
\entry{NAND programming}{94}{NAND programming}
\entry{NAND other commands}{95}{NAND other commands}
\entry{mFlash Configuration}{97}{mFlash Configuration}
\entry{mFlash commands}{97}{mFlash commands}
\entry{PLD}{100}{PLD}
\entry{FPGA}{100}{FPGA}
\entry{commands}{101}{commands}
\entry{message level}{101}{message level}
\entry{reset}{102}{reset}
\entry{halt}{102}{halt}
\entry{target initialization}{102}{target initialization}
\entry{memory access}{104}{memory access}
\entry{image loading}{105}{image loading}
\entry{image dumping}{105}{image dumping}
\entry{breakpoint}{106}{breakpoint}
\entry{watchpoint}{106}{watchpoint}
\entry{profiling}{106}{profiling}
\entry{Architecture Specific Commands}{108}{Architecture Specific Commands}
\entry{Core Specific Commands}{108}{Core Specific Commands}
\entry{tracing}{108}{tracing}
\entry{ETM}{108}{ETM}
\entry{ETB}{108}{ETB}
\entry{ARM}{112}{ARM}
\entry{disassemble}{112}{disassemble}
\entry{ARM semihosting}{112}{ARM semihosting}
\entry{ARM semihosting}{112}{ARM semihosting}
\entry{ARMv4}{113}{ARMv4}
\entry{ARMv5}{113}{ARMv5}
\entry{ARM7}{113}{ARM7}
\entry{ARM9}{113}{ARM9}
\entry{DCC}{113}{DCC}
\entry{ARM720T}{113}{ARM720T}
\entry{ARM9}{114}{ARM9}
\entry{vector_catch}{114}{vector_catch}
\entry{ARM920T}{114}{ARM920T}
\entry{ARM926ej-s}{114}{ARM926ej-s}
\entry{ARM966E}{115}{ARM966E}
\entry{XScale}{115}{XScale}
\entry{vector_catch}{117}{vector_catch}
\entry{vector_table}{117}{vector_table}
\entry{ARMv6}{117}{ARMv6}
\entry{ARM11}{117}{ARM11}
\entry{vector_catch}{118}{vector_catch}
\entry{ARMv7}{118}{ARMv7}
\entry{Debug Access Port}{118}{Debug Access Port}
\entry{DAP}{118}{DAP}
\entry{Cortex-A}{119}{Cortex-A}
\entry{Cortex-R}{119}{Cortex-R}
\entry{tracing}{119}{tracing}
\entry{SWO}{119}{SWO}
\entry{SWV}{119}{SWV}
\entry{TPIU}{119}{TPIU}
\entry{ITM}{119}{ITM}
\entry{ETM}{119}{ETM}
\entry{Cortex-M}{121}{Cortex-M}
\entry{vector_catch}{121}{vector_catch}
\entry{Linux-ARM DCC support}{123}{Linux-ARM DCC support}
\entry{tracing}{123}{tracing}
\entry{libdcc}{123}{libdcc}
\entry{DCC}{123}{DCC}
\entry{JTAG Commands}{125}{JTAG Commands}
\entry{TAP state names}{127}{TAP state names}
\entry{Serial Vector Format}{128}{Serial Vector Format}
\entry{SVF}{128}{SVF}
\entry{Xilinx Serial Vector Format}{128}{Xilinx Serial Vector Format}
\entry{XSVF}{128}{XSVF}
\entry{Utility Commands}{129}{Utility Commands}
\entry{RAM testing}{129}{RAM testing}
\entry{Firmware recovery}{129}{Firmware recovery}
\entry{TFTP}{130}{TFTP}
\entry{GDB}{131}{GDB}
\entry{Connecting to GDB}{131}{Connecting to GDB}
\entry{Programming using GDB}{133}{Programming using GDB}
\entry{SMP}{133}{SMP}
\entry{RTOS Support}{134}{RTOS Support}
\entry{Tcl Scripting API}{136}{Tcl Scripting API}
\entry{Tcl scripts}{136}{Tcl scripts}
\entry{RPC}{137}{RPC}
\entry{RPC Notifications}{137}{RPC Notifications}
\entry{RPC trace output}{138}{RPC trace output}
\entry{faq}{139}{faq}
\entry{RTCK}{139}{RTCK}
\entry{adaptive clocking}{139}{adaptive clocking}
\entry{Tcl}{144}{Tcl}
